Poor man's castellated holes

I was working on my next prototype board and when I started to get a quote from all the famous 3-letter far-east PCB manufacturers, I was really surprised that the board price went up from single dollars to ~$40 when using castellated holes.

There must be a better (cheaper) way.

So I came up with this concept and plan (executed in KiCAD).

  1. Instead of putting a plated through hole on the board edge, I am drawing the board outline with a half circle dipping into the board at this location.
  2. Using the "Custom Pad Shape (circular base) I am adding 2 pads on top and bottom layer that are arc shaped. Standard copper to board edge seems to be 0.3mm (12mil) now, which is not too large.
  3. As a pad, this copper area has the soldermask removed automatically.
  4. In the footprint, removing the soldermask between the pad and the board edge might help a little when bridging the gap to make contact.
  5. A manual via needs to be placed somewhere in the pad area to connect the top and bottom layer pads.
  6. Now I can add test pin headers into the half circle with reasonable good location positioning, and bridging the 0.3mm with sufficient solder blobs.

Here are images of the component pad design and the 3D image of the board, comparing are real castellated pin and my poor man’s version.

KiCAD footprint editor:

3D Viewer (I know, silkscreen designators need to be cleaned up):

The holes are spaced 2.54mm (100mil) apart for using standard pin headers.

I will see how this is going to work, when I have boards back some time in the not too distant future.

And of course after doing this, I checked the NA PCB prototype company with the purple soldermask. They claim: " Castellations Allowed, but not guaranteed". But then I would need to assemble the board myself, which I don’t have the means to do at the moment.