Podcast Title: Dr. Duncan Haldane from JITX on Automating Circuit Design
Release Date: November 28, 2023
Episode: #406
Parker and Stephen welcome JITX CEO and Co-founder, Dr. Duncan Haldane, to the show to discuss his company, which is a code-powered PCB design platform that aims to revolutionize circuit board design by integrating automation with human expertise. Prior to co-founding JITX, Dr. Haldane was responsible for a “hyper-aggressive pogo-stick” robot called Salto-1P. After discovering just how much work went into designing Salto-1P, Duncan was inspired to start JITX, because he wanted a better way to design robots. In an approach that some engineers find divisive, JITX is innovating in ways to design circuit boards by writing code, and so Parker and Stephen asked Dr. Haldane to explain his background, the problems JITX is trying to resolve, the company’s plans to build a new auto-router, just what exactly the deal was with that “hyper-aggressive pogo-stick,” and much more!
Podcast Audio:
Podcast Notes:
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As an “engineer who went into software but eventually came back to electronics” this totally floats my boat;-) Great interview with Dr Duncan!
I hadn’t heard about JITX before. My first thought was it reminded my of Saar Drimer’s pcbmode but just much more significantly evolved. I wondered if this or other prior art had influenced JITX.
This is not a field I’ve spent any time researching. Does JITX stand alone, or are there other significant products trying to play in the “circuit design as code” arena?
I’ve got the SKiDL project which is a Python library that allows circuit design. I’m using it for the circuits as code library, but that hasn’t gotten as far as I’d like.
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interesting! yes, this approach reminds me very much of pcbmode; the issue with all these initiatives seems to be finding a sufficient audience willing to dive in and drive the adoption.
PS: found quite a few 404 references to https://xess.com/skidl
I see a couple of links to the old xesscorp Github account in the circuitsascode site. I’ll change those as I get around to re-awakening that repo.
A couple more circuits-as-code efforts:
- Polymorphic Blocks
- PCBDL
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One barrier is that EEs are trained using circuit diagrams to analyze things with Kirchoff’s voltage/current laws. Then they carry that forward and use circuit schematics to specify electronics even though most modern systems don’t lend themselves to KCL/KVL. And then they have to try and jam a bunch of design information into a graphical format that doesn’t support it. (You can see examples of this on the KiCad forum where users struggle with hierarchical design and bus connections when these things are handled so easily in a coding framework.)
Significant adoption of text-based circuit design may have to come from outside. Back in the 70’s, Carver Mead and Lynn Conway developed a simplified form of VLSI design that used a handful of layers and process parameters along with the simple Caltech Intermediate Form (CIF) for describing transistor geometries. Chip engineers of the time hated it: they thought the simplifications limited the performance that could be gotten from their advanced processes (and it did). But univerity-based computer scientists/engineers loved it because now they could get into the chip design game by following a handful of simple rules. They started writing code that would generate CIF for RAMs/ROMs, programmable logic arrays, ALUs, etc. along with tools to extract netlists and do timing and simulation. And they graduated students who learned to design this way. Decades later, the result is that most digital chip (and FPGA) design is done textually. Maybe text-based PCB design needs a similar effort within universities in order to take hold.
The other factor that might promote text-based circuit design is LLMs. Getting ChatGPT to design a PCB through a GUI is a lot tougher than having it spit out text. (Not saying it couldn’t be done: people are surprisingly ingenious.)
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Hello, Duncan here! Happy to dig in further if y’all have any questions.
It doesn’t seem like a near term option to separate an EE from their schematics. We had to hug the cactus a little bit and generate pretty schematics, even though from a design perspective the netlist data is redundant.
In all fairness, my auto-generated schematic help debug design code all the time. So maybe schematics stick around forever? Vivado still generates block diagrams, which is a point in favor of that future.
I agree. Jitx has to sell into the existing market of PCB designers (sometimes described as “hidebound”) and they demand schematics. There’s no future in going broke now.
But longer term, engineers are going to have to go to a more code-like experience. Parameterization is one big advantage that they’ll want and schematics don’t support that intuitively. Meanwhile, all their coding skills will translate directly toward circuit design so that’s a win for them on a personal level.
We’ve already seen this transition before. In the mid-90’s, there was a big debate on comp.arch.fpga about whether FPGA design was done more efficiently/faster using schematics or HDLs. Thirty years later, we can see how reality decided that debate (although spaghetti schematics live on as vestigial organs in most FPGA design suites).
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